Basic Goals: Separation of Concerns Generate efficient code sequences for individual operations Keep it fast and simple: leave most optimizations to later phases Provide clean, easy-to-optimize code IR forms the basis for code optimization and target code generation

Assumptions Intermediate language: RISC-like 3-address code‡ Intermediate Code Generation (ICG) is independent of target ISA Storage layout has been pre-determined Infinite number of registers + Frame Pointer (FP) Q. What values can live in registers? ‡ ILOC: Cooper and Torczon, Appendix A. Strategy 1. Simple bottom-up tree-walk on AST 2. Translation uses only local info: current AST node + children 3. Good (local) code is important! ⇐= Later passes have less semantic information ⇐= E.g., array indexing, boolean expressions, case statements 4. We will discuss important special cases